Globalization of design, fabrication, test, and assembly of electronic systems has raised serious concerns about the Security and Trustworthiness (S&T) of microelectronics. It is of vital importance to develop protection techniques for microelectronic devices throughout their lifecycle to enable the use of commercially available technologies without compromising the S&T of the system.
The candidate will be part of a research team that develops different methods to asses and enhance the S&T of system-on-chip on algorithm, architecture, and circuit levels. All developed methods will be integrated in the commercial design flow and will be applied to industrial level SoC, which will be fabricated on silicon.

Qualifications

• MSc. degree in Microelectronics or Computer Engineering.
  
• 2-4 years digital IC design experience (candidate “must” have previous tapeout experience).
  
• Deep understanding of Digital Logic, Computer Architecture.
• Previous industrial experience is much appreciated.
• Professional level in HDL is required (VHDL and/or Verilog).
  
• Hands-on experience with ASIC/FPGA design flow including simulation, synthesis, verification, timing analysis, physical design, and chip signoff.
• [Preferred] Experience in asynchronous logic, cryptoprocessor design, HW S&T 
• [Preferred]  Experience in PCB design, board assembly, and chip testing
• [Preferred]  Knowledge of Matlab and Simulink 
  
• [Preferred]  Knowledge of programming (C or C++) 
• Hands-on experience with scripting (C Shell, TCL, Perl,… etc).
  
• Excellent English communication skills is a “MUST”.