Internship with Mentor Graphics

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Location: Mentor Graphics Egypt (Heliopolis)
Duration: 1 day/week 18/3/17 - 4/5/17 and then 5 days/week 2/7/17-31/8/17
CHEP Internship Credit:  8 weeks
The scope of this internship is to deepen your knowledge and skills in digital system modeling using TLM.
Requirements: 
  • Expected to Graduate in 2018.
  • To be from the following programs/departments: ECE, COMM, CSE, CESS
  • Knowledge and experience in the following is a plus:
    ​- Digital IC Design
    ​- Logic Design
    - Verilog/VHDL 
Responsibilities: 
  • Be available and dedicated in the dates specified above 
  • Assist in designing  and and implementing a RF transciever
  • ​Document all data and results following the documentation guidelines